Digital Verification CAD Engineer

Job Description We are seeking a Digital Verification CAD Engineer to work closely with verification teams to enhance and streamline digital verification methodologies and flows. This role focuses on developing automation solutions, improving verification efficiency, and leveraging AI-driven tools to optimize simulation, regression, debug, and coverage workflows. Responsibilities • Collaborate with verification engineers to identify and resolve flow and methodology challenges • Develop, integrate, and maintain CAD tools supporting digital verification environments • Apply AI/ML-based solutions to improve verification productivity and debug efficiency • Automate repetitive tasks and optimize simulation and regression workflows • Support the adoption of AI-enabled verification methodologies and tools • Analyze bottlenecks and propose scalable automation solutions • Provide technical guidance and support for new tools and methodologies Required Skills • Strong understanding of digital verification flows, including simulation, regression, coverage, and debug • Experience with SystemVerilog, UVM, or related verification methodologies • Strong scripting/programming skills in Python, Perl, Tcl, or similar • Familiarity with AI/ML tools or frameworks applied to engineering workflows • Experience with EDA AI platforms such as Cadence Verisium • Strong debugging and problem-solving skills