Amaze Systems

SystemC Modelling Engineer

⭐ - Featured Role | Apply direct with Data Freelance Hub
This role is for a SystemC Modelling Engineer on a long-term contract, remote location, offering competitive pay. Key skills required include SystemC, C++, and embedded systems architecture. Experience in hardware/software co-design and verification is essential.
🌎 - Country
United States
💱 - Currency
$ USD
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💰 - Day rate
Unknown
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🗓️ - Date
November 25, 2025
🕒 - Duration
Unknown
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🏝️ - Location
Remote
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📄 - Contract
Unknown
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🔒 - Security
Unknown
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📍 - Location detailed
United States
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🧠 - Skills detailed
#Embedded Systems #C++ #Linux #Perl #Scripting #Version Control #Python #GIT #Debugging #Documentation #IP (Internet Protocol) #Code Reviews
Role description
Role: SystemC Modelling Engineer Location: Remote Type- Long-Term-Contract Description: • Will be responsible for developing and maintaining high-fidelity system-level models using SystemC for hardware/software co-design and verification. • This role is crucial for enabling early performance analysis, architecture exploration, and functional validation of complex embedded systems. • The engineer will work closely with architecture, design, and verification teams to ensure the accuracy and efficiency of the SystemC models. • Projects will involve modeling various components of a platform, including processors, memory subsystems, and peripherals. • The candidate will utilize SystemC and related simulation environments. Key Roles & Responsibilities: • Develop and maintain accurate and efficient SystemC models of platform components, including processors, memory controllers, and peripherals. • Implement TLM-based interfaces for communication between SystemC models and other simulation environments. • Validate the accuracy of SystemC models through comparison with RTL simulations and hardware prototypes, achieving a model fidelity target of X% (define target). • Collaborate with architecture and design teams to define modeling requirements and ensure models accurately reflect system specifications. • Contribute to the development of SystemC modeling guidelines and best practices within the organization. • Create and maintain documentation for SystemC models, including model descriptions, usage examples, and validation reports. • Debug and resolve issues identified during SystemC simulation, improving model performance and stability, reducing simulation time by X%. • Participate in code reviews and provide constructive feedback to other engineers. Required Skills: • SystemC & TLM (Transaction Level Modeling) • C++ (Proficient level, including object-oriented design principles) • Hardware Description Languages (HDLs): VHDL or Verilog (Understanding and ability to interface with) • Debugging Tools (e.g., GDB, DVE) • Scripting Languages (Python, Perl, or similar) • Version Control Systems (Git) • Embedded Systems Architecture (Understanding of processor architectures, memory hierarchies, and bus protocols) • Communication (Excellent written and verbal communication skills) • Problem-Solving (Strong analytical and problem-solving abilities) • Team Collaboration (Ability to work effectively in a team environment) • Defining transaction level models of non-memory mapped interfaces (I2C, SPI, USB, CAN, Ethernet etc.) • Porting the embedded operating system (Linux, VxWorks, Android ) on the virtual prototype, developing the device drivers etc. • Verification of models at IP & SoC level. • Develop regress able self-checking test suites using C/ARM assembly. • Develop System Level Flows and Methodologies using virtual prototypes Desired Skills: • Experience with Board bring-up, platform initialization, board support package development, peripherals such as PCIe, I2C, SPI, USB, UART , OS primitives, memory management, scheduling, interrupts, and multi-threading. • Good experience in system level debugging with comprehensive understanding of managing and prioritizing system level issues. • Extensive background in firmware development or embedded software development within a multicore environment or hardware context.