Creospan Inc.
Design Engineer
⭐ - Featured Role | Apply direct with Data Freelance Hub
This role is for a Design Engineer – ASIC Power Engineer in Sunnyvale, CA (Hybrid) for 2+ to 10 years of ASIC Power/Low-Power Design experience. Key skills include RTL analysis, scripting (Python/Perl/Tcl), and familiarity with PrimePower/PTPX.
🌎 - Country
United States
💱 - Currency
$ USD
-
💰 - Day rate
Unknown
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🗓️ - Date
April 14, 2026
🕒 - Duration
Unknown
-
🏝️ - Location
Hybrid
-
📄 - Contract
Unknown
-
🔒 - Security
Unknown
-
📍 - Location detailed
Sunnyvale, CA
-
🧠 - Skills detailed
#Perl #IP (Internet Protocol) #Automation #Matlab #Scripting #Visualization #Python #Data Analysis
Role description
Job Title: Design Engineer – ASIC Power Engineer
Location: Sunnyvale, CA (Hybrid)
🔧 Key Responsibilities:
• Perform RTL and netlist-level power analysis & optimization
• Support PPA optimization using Fusion Compiler
• Analyze and debug reports from Synthesis, PD, Timing, and Power flows
• Implement low-power methodologies and UPF
• Develop automation scripts for report and data analysis
✅ Required Skills:
• 2+ to 10 years experience in ASIC Power / Low-Power Design
• Hands-on experience with PrimePower / PTPX or Cadence Joules
• Experience with DC, ICC, VCS, Verdi
• Strong scripting skills in Python / Perl / Tcl
• Experience working with UPF and power estimation flows
⭐ Nice to Have:
• Silicon power characterization experience
• IP / SoC-level power profiling exposure
• Data visualization using Excel / MATLAB
📩 Please share your updated resume if interested.
Job Title: Design Engineer – ASIC Power Engineer
Location: Sunnyvale, CA (Hybrid)
🔧 Key Responsibilities:
• Perform RTL and netlist-level power analysis & optimization
• Support PPA optimization using Fusion Compiler
• Analyze and debug reports from Synthesis, PD, Timing, and Power flows
• Implement low-power methodologies and UPF
• Develop automation scripts for report and data analysis
✅ Required Skills:
• 2+ to 10 years experience in ASIC Power / Low-Power Design
• Hands-on experience with PrimePower / PTPX or Cadence Joules
• Experience with DC, ICC, VCS, Verdi
• Strong scripting skills in Python / Perl / Tcl
• Experience working with UPF and power estimation flows
⭐ Nice to Have:
• Silicon power characterization experience
• IP / SoC-level power profiling exposure
• Data visualization using Excel / MATLAB
📩 Please share your updated resume if interested.
